GAL22V10B15QP Electrically-Erasable PLD (EEPLD) - Active Pull-ups
From Lattice Semiconductor
| Logic Modes | CombnSeqnt |
| Military | N |
| No. of Outputs | 10 |
| Nom. Supp (V) | 5 |
| Number of Inputs | 22 |
| Output Config | 3-State |
| Package | DIP |
| Pins | 24 |
| Prod. Terms Max. | 17 |
| Technology | CMOS |
| t(PLH) Maximum (S) | 15n |
