GAL22V10B20LR/883 Electrically-Erasable PLD (EEPLD) - 20 yr data retention
From Lattice Semiconductor
Logic Modes | CombnSeqnt |
Military | Y |
No. of Outputs | 10 |
Nom. Supp (V) | 5 |
Number of Inputs | 22 |
Output Config | 3-State |
Package | QCC-N |
Pins | 28 |
Prod. Terms Max. | 17 |
Technology | CMOS |
t(PLH) Maximum (S) | 20n |