ISPGAL22V10B7LJ Electrically-Erasable PLD (EEPLD) - In-system programble
From Lattice Semiconductor
| Logic Modes | CombnSeqnt |
| Military | N |
| No. of Outputs | 10 |
| Nom. Supp (V) | 5.0 |
| Number of Inputs | 22 |
| Output Config | 3-State |
| Package | QCC-J |
| Pins | 28 |
| Prod. Terms Max. | 9-17 |
| Technology | CMOS |
| t(PLH) Maximum (S) | 7.5n |
