ISPGDS18-7P EE PLD, 7.5 ns, PDIP24
From Lattice Semiconductor Corporation
| Status | ACTIVE |
| Clock Freq-Max (fclk) | 50 MHz |
| Mfr Package Description | PLASTIC, DIP-24 |
| Number of Dedicated Inputs | 0.0 |
| Number of Functions | 1 |
| Number of I/O Lines | 22 |
| Number of Terminals | 24 |
| Operating Temperature-Max | 75 Cel |
| Operating Temperature-Min | 0.0 Cel |
| Organization | 0 DEDICATED INPUTS, 22 I/O |
| Output Function | MACROCELL |
| Package Body Material | PLASTIC/EPOXY |
| Package Shape | RECTANGULAR |
| Package Style | IN-LINE |
| Programmable Logic Type | EE PLD |
| Propagation Delay (tpd) | 7.5 ns |
| Supply Voltage-Max (Vsup) | 5.25 V |
| Supply Voltage-Min (Vsup) | 4.75 V |
| Supply Voltage-Nom (Vsup) | 5 V |
| Technology | CMOS |
| Temperature Grade | COMMERCIAL EXTENDED |
| Terminal Finish | TIN LEAD |
| Terminal Form | THROUGH-HOLE |
| Terminal Pitch | 2.54 mm |
| Terminal Position | DUAL |
