ISPLSI2032-110LJ Electrically-Erasable PLD (EEPLD) - In System Program.
From Lattice Semiconductor
| Logic Modes | CombnSeqnt |
| Military | N |
| No. of Outputs | 32 |
| Nom. Supp (V) | 5.0 |
| Number of Inputs | 34 |
| Output Config | 3-State |
| Package | QCC-J |
| Pins | 44 |
| Prod. Terms Max. | 160 |
| Technology | CMOS |
| t(PLH) Maximum (S) | 13n |
