GAL22V10B15LD/883 Electrically-Erasable PLD (EEPLD) - Low power version
From Lattice Semiconductor
Logic Modes | CombnSeqnt |
Military | Y |
No. of Outputs | 10 |
Nom. Supp (V) | 5.0 |
Number of Inputs | 22 |
Output Config | 3-State |
Package | DIP |
Pins | 24 |
Prod. Terms Max. | 9-17 |
Technology | CMOS |
t(PLH) Maximum (S) | 15n |