74AUP2G07GW AUP/ULP/V SERIES, DUAL 1-INPUT NON-INVERT GATE, PDSO6
From NXP
| Status | ACTIVE |
| China RoHS Compliant | Yes |
| EU RoHS Compliant | Yes |
| Family | AUP/ULP/V |
| Lead Free | Yes |
| Logic IC Type | NON-INVERT |
| Mfr Package Description | PLASTIC, SOT-363, SC-88, 6 PIN |
| Number of Functions | 2 |
| Number of Inputs | 1 |
| Number of Terminals | 6 |
| Operating Temperature-Max | 125 Cel |
| Operating Temperature-Min | -40 Cel |
| Output Characteristics | O-DRN |
| Package Body Material | PLASTIC/EPOXY |
| Package Shape | RECTANGULAR |
| Package Style | SMALL OUTLINE, THIN PROFILE, SHRINK PITCH |
| Propagation Delay (tpd) | 20.7 ns |
| Supply Voltage-Max (Vsup) | 3.6 V |
| Supply Voltage-Min (Vsup) | 0.8000 V |
| Supply Voltage-Nom (Vsup) | 1.1 V |
| Surface Mount | Yes |
| Technology | CMOS |
| Temperature Grade | AUTOMOTIVE |
| Terminal Finish | TIN |
| Terminal Form | GULL WING |
| Terminal Pitch | 0.6500 mm |
| Terminal Position | DUAL |
