K4H510438J-BPB30 128M X 4 DDR DRAM, 0.7 ns, PBGA60
From Samsung Semiconductor Division
| Status | EOL/LIFEBUY |
| Access Mode | FOUR BANK PAGE BURST |
| Access Time-Max (tRAC) | 0.7000 ns |
| EU RoHS Compliant | Yes |
| Lead Free | Yes |
| Memory Density | 5.37E8 deg |
| Memory IC Type | DDR DRAM |
| Memory Width | 4 |
| Mfr Package Description | HALOGEN FREE AND ROHS COMPLIANT, FBGA-60 |
| Number of Functions | 1 |
| Number of Ports | 1 |
| Number of Terminals | 60 |
| Number of Words | 1.34E8 words |
| Number of Words Code | 128M |
| Operating Mode | SYNCHRONOUS |
| Operating Temperature-Max | 85 Cel |
| Operating Temperature-Min | -40 Cel |
| Organization | 128M X 4 |
| Package Body Material | PLASTIC/EPOXY |
| Package Shape | RECTANGULAR |
| Package Style | GRID ARRAY, THIN PROFILE |
| Supply Voltage-Max (Vsup) | 2.7 V |
| Supply Voltage-Min (Vsup) | 2.3 V |
| Supply Voltage-Nom (Vsup) | 2.5 V |
| Surface Mount | Yes |
| Technology | CMOS |
| Temperature Grade | INDUSTRIAL |
| Terminal Finish | NOT SPECIFIED |
| Terminal Form | BALL |
| Terminal Pitch | 1 mm |
| Terminal Position | BOTTOM |
